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floating-point adder中文什么意思

發(fā)音:   用"floating-point adder"造句
  • 浮點(diǎn)加法器
  • floating:    adj. 1.漂浮的，浮動(dòng)的，流動(dòng)性的。 2.【醫(yī)學(xué)】游 ...
  • point:    n. 1.尖頭，尖端；尖頭器具；〔美國〕筆尖；接種針，雕 ...
  • adder:    n. 小毒蛇，蝰蛇。 deaf as an adder ...
  • floating point adder:    浮點(diǎn)加法器
  • floating point:    浮點(diǎn)法; 浮點(diǎn)數(shù); 浮動(dòng)小數(shù)點(diǎn)
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例句與用法

  1. The data and conclusions prove that these designs are better than the original ones ; the floating - point adder is really optimized
    實(shí)驗(yàn)證明這些設(shè)計(jì)的性能都比原有設(shè)計(jì)有所提高，達(dá)到了優(yōu)化浮點(diǎn)加法器的目的。
  2. The main research area is the structure optimization of floating - point adder , which is intent to minimize the delay of floating - point addition and optimize the circuit structure
    主要研究方向是優(yōu)化浮點(diǎn)加法器結(jié)構(gòu)，減小浮點(diǎn)加法運(yùn)算的延遲，優(yōu)化電路結(jié)構(gòu)。
  3. The algorithm and its implementation of the leading zero anticipation are very vital for the performance of a high - speed floating - point adder in today s state of art microprocessor design . unfortunately , in predicting " shift amount " by a conventional lza design , the result could be off by one position . this paper presents a novel parallel error detection algorithm for a general - case lza
    目前國際上已有很多算法對(duì)前導(dǎo)0預(yù)測算法進(jìn)行了研究，但是出于設(shè)計(jì)方法和延遲等方面的限制，大部分前導(dǎo)0預(yù)測算法都為非精確算法，其預(yù)測結(jié)果可能與真實(shí)加法結(jié)果中前導(dǎo)0的個(gè)數(shù)產(chǎn)生一位的誤差，這個(gè)誤差需要在浮點(diǎn)加法的后規(guī)格化過程中進(jìn)行修正，因此反過來又增加了浮點(diǎn)加減算法的關(guān)鍵路徑延遲。
  4. After that , it gives the measures of designing dsp ' s assembler as a part of the dsp ' s software development environment together with the c - compiler . moreover , this paper explores the method of design the floating - point arithmetic unit . referring to the ieee754 - 1985 standard for binary floating - point arithmetic , the algorithm and the behavior description of floating - point adder and multiplier is given , and the simulation and verification is shown at the end of this paper
    此外，本文還對(duì)處理器的浮點(diǎn)運(yùn)算單元設(shè)計(jì)做了初步的研究，以ansi ieee - 754浮點(diǎn)數(shù)二進(jìn)制標(biāo)準(zhǔn)為參考，借鑒了經(jīng)典的定點(diǎn)加法器和乘法器的設(shè)計(jì)，嘗試性的給出了浮點(diǎn)加法單元和乘法單元的實(shí)現(xiàn)模型和行為級(jí)上的硬件描述，并對(duì)其進(jìn)行仿真和驗(yàn)證。

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